Causes of block transfer errors – Rockwell Automation 1771-DCM USER MANUAL 1771-DCM User Manual
Page 49
Troubleshooting Your 1771-DCM
Chapter 8
8Ć2
LED
Status
Diagnosis
BCKPLN
COM
Blinking
The 1771-DCM turns on this LED for half a second at the comĆ
pletion of a read or write block transfer. This LED blinks when:
•
The local processor performs block transfers at a
rate slower than once every 1/2 second.
•
With the 1771-DCM in protected data mode, the
supervisory processor performs block transfers
at a rate slower than once every 1/2 second.
Reduce program scan and/or I/O scan time if possible in either
processor.
OFF
No block transfers are occurring across the backplane between
the local processor and 1771-DCM. Refer to Block Transfer
Errors for the local processor, below.
DCM FLT
ON
The 1771-DCM has detected an internal fault and is not operatĆ
ing. Cycle power to the I/O chassis containing the 1771-DCM.
Replace it if the LED remains lit when you restore power.
If the 1771-DCM is the only thing connected to a supervisory
PLC-3, and the scanner baud is 115.2K, the DCM will stop
communicating and turn on the red fault light after approximateĆ
ly 20 minutes of communication.
Observe block transfer rungs in the ladder diagram program of the
processor not performing block transfers. You have a block transfer error
when you observe one or both of the following:
The block transfer error bit is intensified (PLC–3 processor).
Enable and done bits of block transfer instructions either do not
intensify or remain intensified. They should alternately turn ON
(intensify) and turn OFF.
Block transfer errors are caused if one more more of the following are
incorrect:
The 1771–DCM’s location (RGS) in the local I/O chassis must match
the RGS of block transfer instructions in the local processor’s ladder
program.
The address of the I/O chassis simulated by the 1771–DCM (RGS)
must match the module address (RGS) of block transfer instructions in
the supervisory processor’s ladder program.
The block lengths of read and write block transfer instructions should
be equal (PLC–2 family processors); or if different, do not enable BTR
and BTW instructions in the same scan.
Causes of Block Transfer Errors