Cirrus Logic CS61584A User Manual
Preliminary product information, Features, Description
Table of contents
Document Outline
- CS61584A
- Features
- Description
- TABLE OF CONTENTS
- LIST OF TABLES
- LIST OF FIGURES
- 1. CHARACTERISTICS AND SPECIFICATIONS
- ABSOLUTE MAXIMUM RATINGS
- RECOMMENDED OPERATING CONDITIONS
- ANALOG CHARACTERISTICS
- DIGITAL CHARACTERISTICS
- SWITCHING CHARACTERISTICS
- SWITCHING CHARACTERISTICS - SERIAL PORT
- SWITCHING CHARACTERISTICS - PARALLEL PORT
- Figure 6. Parallel Port Timing - Motorola Mode
- Figure 7. Parallel Port Timing - Intel Read Mode
- Figure 8. Parallel Port Timing - Intel Write Mode
- Figure 9. Parallel Port Timing - Motorola Mode to RAM
- Figure 10. Parallel Port Timing - Intel Read Mode from RAM or ROM
- Figure 11. Parallel Port Timing - Intel Write Mode to RAM
- SWITCHING CHARACTERISTICS - JTAG
- 2. OVERVIEW
- 3. TRANSMITTER
- 4. RECEIVER
- 5. JITTER ATTENUATOR
- 6. REFERENCE CLOCK
- 7. POWER-UP RESET
- 8. LINE CONTROL AND MONITORING
- 9. HOST MODE
- 10. JTAG BOUNDARY SCAN
- Figure 23. JTAG Circuitry Block Diagram
- 10.1 JTAG Data Registers (DR)
- 10.2 JTAG Instructions and Instruction Register (IR)
- 10.3 JTAG TAP Controller
- 10.4 Test-Logic-Reset State
- 10.5 Run-Test/Idle State
- 10.6 Select-DR-Scan State
- 10.7 Capture-DR State
- 10.8 Shift-DR State
- 10.9 Exit1-DR State
- 10.10 Pause-DR State
- 10.11 Exit2-DR State
- 10.12 Update-DR State
- 10.13 Select-IR-Scan State
- 10.14 Capture-IR State
- 10.15 Shift-IR State
- 10.16 Exit1-IR State
- 10.17 Pause-IR State
- 10.18 Exit2-IR State
- 10.19 Update-IR State
- 10.20 JTAG Application Examples
- 11. PIN DESCRIPTIONS
- 12. PACKAGE DIMENSIONS
- 13. APPLICATIONS
- Ordering Information