Cirrus Logic CS4953xx - Manual (Page 14)

CS4953xx Data Sheet
32-bit Audio Decoder DSP Family
DS705F2 14
5.10 Switching Characteristics — Serial Control Port - SPI Slave Mode
Parameter Symbol Min Typical Max Units
SCP_CLK frequency
1,2
1. The specification f
spisck
indicates the maximum speed of the hardware. The system designer should be aware that
the actual maximum speed of the communication port may be limited by the firmware application. Flow control using
the SCP_BSY pin should be implemented to prevent overflow of the input data buffer. At boot the maximum speed
is F
xtal
/3.
2. When SCP1 is in SPI slave mode, very slow rise and fall times of the SCP_CLK edges may make the edges of the
SCP_CLK more susceptible to noise, resulting in non-smooth edges. Any glitch at the threshold levels of the SCP
port input signals could result in abnormal operation of the port.
In systems that have noise coupling onto SCP_CLK, slow rise and fall times may cause host communication
problems. Increasing rise time makes host communication more reliable.
f
spisck
— — 25 MHz
SCP_CS falling to SCP_CLK rising 2 t
spicss
24 — — ns
SCP_CLK low time
2
t
spickl
20 — — ns
SCP_CLK high time
2
t
spickh
20 — — ns
Setup time SCP_MOSI input t
spidsu
5 — — ns
Hold time SCP_MOSI input t
spidh
5 — — ns
SCP_CLK low to SCP_MISO output valid 2 t
spidov
— — 11 ns
SCP_CLK falling to SCP_IRQ rising 2 t
spiirqh
— — 20 ns
SCP_CS rising to SCP_IRQ falling
2
t
spiirql
0 — — ns
SCP_CLK low to SCP_CS rising 2 t
spicsh
24 — — ns
SCP_CS rising to SCP_MISO output high-Z t
spicsdz
— 20 — ns
SCP_CLK rising to SCP_BSY falling
2
t
spicbsyl
— 3
*
DCLKP+20 — ns