2 freeze controls (freeze) bit 5, 3 popguard enable (popg_en) bit 4, 4 rmck control (rmck_ctrl[1:0]) bits 3:2 – Cirrus Logic CS4350 User Manual
Page 34: 5 rmck ratio select (r_select[1:0]) bits 2:1, Cs4350
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DS691F2
CS4350
8.7.2
Freeze Controls (FREEZE) Bit 5
Function:
When set to 1, this function allows modifications to be made to the registers without the changes taking
effect until FREEZE is set back to 0. To make multiple changes in the Control Port registers take effect
simultaneously, enable the FREEZE bit, make all register changes, then disable the FREEZE bit.
When set to 0 (default), register changes take effect immediately.
8.7.3
Popguard Enable (POPG_EN) Bit 4
Function:
When set to 1, (default) the Device will initiate a ramping function as outlined in
.
When set to 0, the outputs will step to VQ upon release of PDN.
8.7.4
RMCK control (RMCK_CTRL[1:0]) Bits 3:2
Default = 00
Function: These bits set the function of the RMCK pin with respect to the LRCK.
8.7.5
RMCK Ratio Select (R_SELECT[1:0]) Bits 2:1
Default = 00
Function: To select the RMCK-to-LRCK ratio.
Note:
RMCK_CTRL must be set to 10 to enable this function. Please note the maximum RMCK output
frequency as specified in the
”Switching Specifications - Serial Audio Interface” on page 12
.
RMCK_CTRL1 RMCK_CTRL0
Mode
0
0
256x LRCK for 48 kHz and 96 kHz, 128x @ 192kHz
0
1
512x @ 48kHz, 256x @ 96 kHz, 128x @ 192kHz
1
0
Manual control (see RMCK Ratio Select)
1
1
RMCK pin driven low
R_SELECT1
R_SELECT0
RMCK/LRCK Ratio
0
0
512
0
1
256
1
0
128
1
1
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