Cirrus Logic CS4350 - Manual (Page 24)

24 DS691F2
CS4350
enable the user to alter the chip address (10010[AD1][AD0][R/W]) and should be tied to VLC or GND as
required before powering up the device. SPI Mode will be selected if the device ever detects a high to low
transition on the AD0/CS pin after power-up.
6.2.1 I²C Write
To write to the device, follow the procedure below while adhering to the control port Switching Specifica-
tions in
”Switching Characteristics - Control Port - I²C Format” on page 13 .
1. Initiate a START condition to the I²C bus followed by the address byte. The upper 5 bits must be
10010. The sixth and seventh bit must match the settings of the AD1 and AD0 pins respectively, and
the eighth must be 0 (the eighth bit of the address byte is the R/W bit).
2. Wait for an acknowledge (ACK) from the part, then write to the memory address pointer, MAP. This
byte points to the register to be written.
3. Wait for an acknowledge (ACK) from the part, then write the desired data to the register pointed to by
the MAP.
4. If the INCR bit (see Section 6.1 ) is set to 1, repeat the previous step until all the desired registers are
written, then initiate a STOP condition to the bus.
5. If the INCR bit is set to 0 and further I²C writes to other registers are desired, it is necessary to initiate
a repeated START condition and follow the procedure detailed from step 1. If no further writes to other
registers are desired, initiate a STOP condition to the bus.
6.2.2 I²C Read
To read from the device, follow the procedure below while adhering to the control port switching specifi-
cations in
”Switching Characteristics - Control Port - I²C Format” on page 13 .
1. Initiate a START condition to the I²C bus followed by the address byte. The upper 5 bits must be
10010. The sixth and seventh bits must match the setting of the AD1 and AD0 pins, respectively, and
the eighth must be 1. The eighth bit of the address byte is the R/W bit.
2. After transmitting an acknowledge (ACK), the device will then transmit the contents of the register
pointed to by the MAP. The MAP register will contain the address of the last register written to the
MAP or the default address (see
Section 6.4.2 ) if an I²C read is the first operation performed on the
device.
3. Once the device has transmitted the contents of the register pointed to by the MAP, issue an ACK.
4. If the INCR bit is set to 1, the device will continue to transmit the contents of successive registers.
Continue providing a clock and issue an ACK after each byte until all the desired registers are read;
then initiate a STOP condition to the bus.
5. If the INCR bit is set to 0 and further I²C reads from other registers are desired, it is necessary to
initiate a repeated START condition and follow the procedure detailed from steps 1 and 2 from the I²C
Write instructions, followed by step 1 of the I²C Read section. If no further reads from other registers
are desired, initiate a STOP condition to the bus.