4 analog outputs, Figure 12. dsp engine signal flow, Figure 12.dsp engine signal flow – Cirrus Logic CS42L55 User Manual
Page 26: Cs42l55, Referenced control register location, Fixed function dsp

26
DS773F1
CS42L55
4.4
Analog Outputs
Referenced Control
Register Location
DSP
PDN_DSP
DEEMPH
PMIXxMUTE
PMIXxVOL[6:0]
INV_PCMx
PCMxSWAP[1:0]
AMIXxMUTE
AMIXxVOL[6:0]
ADCxSWAP[1:0]
MSTxVOL[7:0]
MSTxMUTE
DIGSFT
PLYBCKB=A
TC_EN
BASS_CF[1:0]
TREB_CF[1:0]
BASS[3:0]
TREB[3:0]
Limiter
LIMIT
LIMIT_ALL
LIMSRDIS
LMAX[2:0]
CUSH[2:0]
LIMARATE[7:0]
LIMRRATE[7:0]
Beep Generator
“Power Down DSP” on page 50
“HP/Line De-Emphasis” on page 50
“PCM Mixer Channel x Mute” on page 52
“PCM Mixer Channel x Volume” on page 52
“Invert PCM Signal Polarity” on page 51
“PCM Mix Channel Swap” on page 60
“ADC Mixer Channel x Mute” on page 51
“ADC Mixer Channel x Volume” on page 51
“ADC Mix Channel Swap” on page 60
“Master Volume Control” on page 57
“Master Playback Mute” on page 51
“Digital Soft Ramp” on page 46
“Playback Channels B=A” on page 50
“Tone Control Enable” on page 56
“Bass Corner Frequency” on page 56
“Treble Corner Frequency” on page 55
“Bass Gain” on page 56
“Treble Gain” on page 56
“Peak Detect and Limiter” on page 61
“Peak Signal Limit All Channels” on page 61
“Limiter Soft Ramp Disable” on page 66
“Limiter Maximum Threshold” on page 60
“Limiter Cushion Threshold” on page 61
“Limiter Attack Rate” on page 62
“Limiter Release Rate” on page 62
Refer to
for all referenced controls
Beep
Generator
VOL
Σ
Bass/
Treble/
Control
Σ
VOL
Peak
Detect
Limiter
Chnl Vol.
Settings
Channel
Swap
Demph
VOL
VOL
MSTAVOL[7:0]
MSTBVOL[7:0]
AMIXAMUTE
AMIXBMUTE
AMIXAVOL[6:0]
AMIXBVOL[6:0]
PMIXAMUTE
PMIXBMUTE
PMIXAVOL[6:0]
PMIXBVOL[6:0]
BPVOL[4:0]
DEEMPH
TC_EN
BASS_CF[1:0]
TREB_CF[1:0]
BASS[3:0]
TREB[3:0]
Fixed Function DSP
MSTAMUTE
MSTBMUTE
DIGSFT
PLYBCKB=A
LIMARATE[7:0]
LIMRRATE[7:0]
LMAX[2:0]
CUSH[2:0]
LIMSRDIS
LIMIT
LIMIT_ALL
PCMASWAP[1:0]
PCMBSWAP[1:0]
PCM
Serial
In
te
rfac
e
INPUTS FROM ADCA
and ADCB
OFFTIME[2:0]
ONTIME[3:0]
FREQ[3:0]
BEEP[1:0]
Digital Mix to ADC
Serial Interface
Channel
Swap
INV_PCMA
INV_PCMB
ADCASWAP[1:0]
ADCBSWAP[1:0]
PDN_DSP
DAC
to HP and
Line MUX
MSTxVOL[7:0], MSTxMUTE and DIGSFT are always
available regardless of the PDN_DSP setting.
*
*
Figure 12. DSP Engine Signal Flow