Cirrus Logic CS42426 - Manual (Page 18)

18 DS604F2
CS42426
3. TYPICAL CONNECTION DIAGRAMS
VLS
AOUTA1+
100 µF
0.1 µF
+
+
17
18
VQ
FILT+
36
37
0.1 µF
4.7 µF
0.1 µF
+3.3 V
to +5.0 V
53
Analog Output Buffer 2
and
Mute Circuit (optional)
AOUTA1-
AOUTB1+
35
34
AOUTB1-
AOUTA2+
32
33
AOUTA2-
AOUTB2+
31
30
AOUTB2-
AOUTA3+
28
29
AOUTA3-
AOUTB3+
27
26
AOUTB3-
MUTEC
38
Mute
Drive
(optional)
25
DGND DGND
5
VLC
0.1 µF
+1.8V
to +5V
6
3
60
59
1
64
61
2
63
8
7
SCL/CCLK
SDA/CDOUT
AD1/CDIN
RST
12
9
2 k 
** Resistors are required for
I 2 C control port operation
OMCK
ADC_LRCK
REFGND
19
AD0/CS
10
INT
11
Digital Audio
Processor
Micro-
Controller
55
RMCK
58
ADCIN1
57
ADCIN2
CS5361
A/D Converter
CS5361
A/D Converter
56
ADC_SDOUT
48
46
44
45
47
43
AGND AGND
52 40 CFILT 3
RFILT 3
LPFLT
39
CRIP 3
2700 pF*
2700 pF*
AINL+
AINL-
AINR+
AINR-
Left Analog Input
Right Analog Input
15
16
14
13
42
1. See the ADC Input Filter section in the Appendix.
2. See the DAC Output Filter section in the Appendix.
3. See the PLL Filter section in the Appendix.
Connect DGND and AGND at single point near Codec
GPO1
GPO2
GPO3
GPO4
GPO5
GPO6
GPO7
DAC_SDIN1
ADC_SCLK
DAC_SDIN3
DAC_SDIN2
DAC_LRCK
DAC_SCLK
Analog
Input
Buffer 1
Analog
Input
Buffer 1
+VA
*
* Pull up or down as
required on startup if the
Mute Control is used.
*
VD
24
0.1 µF +
10 µF
VA
+
10 µF
51 41 4
VA VD
0.1 µF 0.01 µF
0.1 µF +
10 µF
+5 V
0.01 µF
0.01 µF
+3.3 V to +5 V
+
10 µF
0.1 µF 0.01 µF
S/PDIF
CS8416
Receiver
RMCK
OSC
Optional
2 k 
** **
Analog Output Buffer 2
and
Mute Circuit (optional)
Analog Output Buffer 2
and
Mute Circuit (optional)
Analog Output Buffer 2
and
Mute Circuit (optional)
Analog Output Buffer 2
and
Mute Circuit (optional)
Analog Output Buffer 2
and
Mute Circuit (optional)
Figure 5. Typical Connection Diagram
CS42416