Ampro Corporation COM 830 - Manual (Page 42)

Chapter 3 Signals and Pinout Tables
36 Reference Manual COM 830
A-B Connector Pinout
VCC_RTC Real-time clock circuit-power input. Nominally
+3.0V. P
GND Ground - DC power and signal and AC signal
return path.
All available GND connector pins shall be used
and tied to Carrier Board GND plane.
P
Table 3-16. Connector A-B Pinout
Pin Row A Pin Row B Pin Row A Pin Row B
A1 GND (FIXED) B1 GND (FIXED) A56 PCIE_TX4- B56 PCIE_RX4-
A2 GBE0_MDI3- B2 GBE0_ACT# A57 GND B57 GPO2
A3 GBE0_MDI3+ B3 LPC_FRAME# A58 PCIE_TX3+ B58 PCIE_RX3
+
A4 GBE0_LINK100# B4 LPC_AD0 A59 PCIE_TX3- B59 PCIE_RX3-
A5 GBE0_LINK1000# B5 LPC_AD1 A60 GND (FIXED) B60 GND
(FIXED)
A6 GBE0_MDI2- B6 LPC_AD2 A61 PCIE_TX2+ B61 PCIE_RX2
+
A7 GBE0_MDI2+ B7 LPC_AD3 A62 PCIE_TX2- B62 PCIE_RX2-
A8 GBE0_LINK# B8 LPC_DRQ0# A63 GPI1 (*) B63 GPO3
A9 GBE0_MDI1- B9 LPC_DRQ1# A64 PCIE_TX1+ B64 PCIE_RX1
+
A1
0 GBE0_MDI1+ B10 LPC_CLK A65 PCIE_TX1- B65 PCIE_RX1-
A11 GND (FIXED) B11 GND (FIXED) A66 GND B66 WAKE0#
A1
2 GBE0_MDI0- B12 PWRBTN# A67 GPI2 B67 WAKE1#
A1
3 GBE0_MDI0+ B13 SMB_CK A68 PCIE_TX0+ B68 PCIE_RX0
+
A1
4 GBE0_CTREF B14 SMB_DAT A69 PCIE_TX0- B69 PCIE_RX0-
A1
5 SUS_S3# B15 SMB_ALERT# A70 GND (FIXED) B70 GND
(FIXED)
A1
6 SATA0_TX+ B16 SATA1_TX+ A71 LVDS_A0+ B71 LVDS_B0+
A1
7 SATA0_TX- B17 SATA1_TX- A72 LVDS_A0- B72 LVDS_B0-
A1
8 SUS_S4# (*) B18 SUS_STAT# A73 LVDS_A1+ B73 LVDS_B1+
A1
9 SATA0_RX+ B19 SATA1_RX+ A74 LVDS_A1- B74 LVDS_B1-
Table 3-15. Power and GND Signal Descriptions