ARM Cortex R4F User Manual
Page 413

AC Characteristics
ARM DDI 0363E
Copyright © 2009 ARM Limited. All rights reserved.
15-13
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The timing parameters for the dual-redundant core compare logic output buses,
DCCMOUT[7:0] and DCCMOUT2[7:0], are implementation-defined. Contact the
implementer of the macrocell you are working with.
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