FEC AFC1100 - Manual (Page 17)

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4.7.7 Signal Timing Chart
A. Basic Control Signals
FIG. 4-7-7a Basic Control Signals
Because the RESET input clears all fastening data, discrete outputs, and communication
buffers, it should be activated only to clear a System Abnormal or to perform a required Zero
Check. The System will automatically reset with each fastening, and a Manual RESET
activation between cycles could result in data loss. The RESET signal requires a pulse of
200~500 milliseconds.
The STOP input is Normally Closed, and enables all other functions. When STOP is Open,
all operations cease and all inputs and outputs become inactive.
The READY signal enables Axis unit inputs and allows System operation.
The START signal will not operate during RESET, REVERSE, or ABNORMAL signal
activation. The START signal requires a pulse of 200~500 milliseconds.
When the ABNORMAL signal is active, all other signals are disregarded. RESET is an
exception, because RESET must be input to clear an Abnormal output.
REJECT, ACCEPT, ABNORMAL, READY, and BUSY output signals must be interlocked with
BANK 1 and activated only when BANK 1 is selected.
When a BYPASS signal is input to the Axis unit from the PLC, the Axis unit will return a
BYPASS output signal as a confirmation. Axis Units should be monitored to ensure that all
Chapter 4: System Setup and Wiring (Rev. 8/98)
Page 4-17
STOP
READY
RESET
START
FASTENING FASTENING FASTENING
BUSY
NG
(REJECT)
OK
ABNORMAL
BASIC CONTROL SIGNALS
AXIS UNIT SIGNALS
AXIS 2
BYPASS
AXIS 2
BYPASS
AXIS 1 OK
AXIS 1 NG
AXIS 2 OK
AXIS 2 NG
(INPUT)
(OUTPUT)