Atec Agilent-4395A - Manual (Page 23)

Table 1-1. Signal Source Assignment
Pin No. Signal Name Signal Standard
1 GND 0 V
2 INPUT1 TTL level, pulse input (pulse width: 1µs or above)
3 OUTPUT1 TTL level, latch output
4 OUTPUT2 TTL level, latch output
5 OUTPUT PORT A0 TTL level, latch output
6 OUTPUT PORT A1 TTL level, latch output
7 OUTPUT PORT A2 TTL level, latch output
8 OUTPUT PORT A3 TTL level, latch output
9 OUTPUT PORT A4 TTL level, latch output
10 OUTPUT PORT A5 TTL level, latch output
11 OUTPUT PORT A6 TTL level, latch output
12 OUTPUT PORT A7 TTL level, latch output
13 OUTPUT PORT B0 TTL level, latch output
14 OUTPUT PORT B1 TTL level, latch output
15 OUTPUT PORT B2 TTL level, latch output
16 OUTPUT PORT B3 TTL level, latch output
17 OUTPUT PORT B4 TTL level, latch output
18 OUTPUT PORT B5 TTL level, latch output
19 OUTPUT PORT B6 TTL level, latch output
20 OUTPUT PORT B7 TTL level, latch output
21 I/O PORT C0 TTL level, latch output
22 I/O PORT C1 TTL level, latch output
23 I/O PORT C2 TTL level, latch output
24 I/O PORT C3 TTL level, latch output
25 I/O PORT D0 TTL level, latch output
26 I/O PORT D1 TTL level, latch output
27 I/O PORT D2 TTL level, latch output
28 I/O PORT D3 TTL level, latch output
29 PORT C STATUS TTL level, input mode: LOW, output mode: HIGH
30 PORT D STATUS TTL level, input mode: LOW, output mode: HIGH
31 WRITE STROBE SIGNAL TTL level, active low, pulse output (width: 10 µs; typical)
32 +5V PULLUP
33 SWEEP END SIGNAL TTL level, active low, pulse output (width: 20 µs; typical)
34 +5V +5V, 100 mA MAX
35 PASS/FAIL SIGNAL TTL level, PASS: HIGH, FAIL: LOW, latch output
36 PASS/FAIL WRITE STROBE SIGNAL TTL level, active low, pulse output (width: 10 µs; typical)
23