Atec Agilent-J3763A - Manual (Page 37)

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H H H H HS S S S SS S S S SIIIII (((((5 55 55 0 00 00 kb kb kb kb kb/////s ss ss ----- 5 5 5 5 52 22 22 M M M M Mb b b b b/////s) s) s) s) s)
General
This interface comprises a plug-in module (J3762B) suitable for plugging into
the J2300C/D Advisor mainframe and J2900A High Speed undercradle. The
J3762B supports frame-based technologies such as Frame Relay (CIR & SLA),
HDLC, SDLC, and PPP.
Common to Inputs and Outputs:
Connectors:
Two 50 pin SCSI (one to DCE, one to DTE)
Type:
Latch Blocks without rails
Clocking:
Recovered or
Internal (selectable from 50 kbps - 52 Mbps)
Control Signal:
DCE: CA, TM
DTE: TA
Loop Control:
DTE: None, Local DTE, Local Line, Remote Line
DCE: LC
Electrical:
EIA-612
EIA-613
Monitored:
Signal:
DTE: SD
DCE: RD
Clock:
From DCE: ST, RT
From DTE: TT
Status:
DCE Ready: TA
DTE Ready: CA
Loopback:
A: LA
B: LB
Test Mode: TM
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General
V.10/V.11, V.24/V.28/RS-232C, V.35 and V.36/RS-449/422/423 are built into the
J2300D mainframe; X.21 (with J2277A external cable – V.36/RS-449 to DB15)
and RS-530 (with external cable J2278A – V.36/RS-449 to DB25) are also
available.
Detail
Bit rates:
Sync or Sync NRZI, 50 bps to 2.048 Mbps on V.35,
V.36/RS-449/422/423/530 and X.21
Sync or Sync NRZI, 50 bps to 256 kbps on V.24/V.28/RS-232C
Async, 50 bps to 256 kbps
Lead status:
RTS, CTS, DTR, DSR, and CD (V.24/V.28/RS-232C and V.35)
CS, RS, RR, TR, and DM (V.10/V.11 and V.36/RS-449/422/423)