Test configurations, Design considerations – GE Industrial Solutions Austin MegaLynx User Manual
Page 12

Data Sheet
April 19, 2011
Austin MegaLynx
TM
: Non-Isolated DC-DC Power Modules:
4.5 – 5.5Vdc input; 0.8 – 3.63Vdc output; 30A output current
6.0 – 14Vdc input; 0.8 – 5.5Vdc output; 25A output current
LINEAGE
POWER
12
Test Configurations
TO OSCILLOSCOPE
CURRENT PROBE
L
TEST
1μH
B
A
TTE
R
Y
C
S
220μF
E.S.R.<0.1
Ω
@ 20°C 100kHz
Min
150μF
V
IN
(+)
COM
NOTE: Measure input reflected ripple current with a simulated
source inductance (L
TEST
) of 1μH. Capacitor C
S
offsets
possible battery impedance. Measure current as shown
above.
C
IN
Figure 37. Input Reflected Ripple Current Test Setup.
NOTE: All voltage measurements to be taken at the module
terminals, as shown above. If sockets are used then
Kelvin connections are required at the module terminals
to avoid measurement errors due to socket contact
resistance.
V
O
(+)
GND
0.01uF
RESISTIVE
LOAD
SCOPE
COPPER STRIP
GROUND PLANE
10uF
0.1uF
Figure 38. Output Ripple and Noise Test Setup.
V
O
COM
V
IN
(+)
COM
R
LOAD
R
contact
R
distribution
R
contact
R
distribution
R
contact
R
contact
R
distribution
R
distribution
V
IN
V
O
NOTE: All voltage measurements to be taken at the module
terminals, as shown above. If sockets are used then
Kelvin connections are required at the module terminals
to avoid measurement errors due to socket contact
resistance.
Figure 40. Output Voltage and Efficiency Test Setup.
η =
V
O
. I
O
V
IN
. I
IN
x
100 %
Efficiency
Design Considerations
The Austin MegaLynx
TM
module should be connected to
a low-impedance source. A highly inductive source can
affect the stability of the module. An input capacitance
must be placed directly adjacent to the input pin of the
module, to minimize input ripple voltage and ensure
module stability.
To minimize input voltage ripple, low-ESR ceramic
capacitors are recommended at the input of the module.
Figure 41 shows the input ripple voltage for various
output voltages at 25A of load current with 2x22 µF or
4x22 µF ceramic capacitors and an input of 12V. Figure
42 shows data for the 5Vin case, with 2x47µF and
4x47µF of ceramic capacitors at the input, and for a load
current of 30A.
Input
Ri
ppl
e Vol
tage (mVp-
p
)
0
20
40
60
80
100
120
140
160
180
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
2 x 22uF
4 x 22uF
Output
Voltage
(Vdc)
Figure 41. Input ripple voltage for various output
voltages with 2x22 µF or 4x22 µF ceramic capacitors
at the input (25A load). Input voltage is 12V.
Input
Ri
ppl
e
Vol
tage (m
Vp-p)
0
10
20
30
40
50
60
0.5
1
1.5
2
2.5
3
3.5
2 x 47uF
4 x 47uF
Output
Voltage
(Vdc)
Figure 42. Input ripple voltage in mV, p-p for various
output voltages with 2x47 µF or 4x47 µF ceramic
capacitors at the input (25A load). Input voltage is
5V.