B&B Electronics MODSCAN32 - Manual - Manual (Page 10)

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message. The ASCII mode uses twice as many characters as the RTU mode, but decoding handling the
ASCII data is easier. Additionally, in the RTU mode, message characters must be transmitted in a
continuous stream. In the ASCII mode, breaks of up to one second can occur between characters to allow
for a relatively slower master.
Error Detection
There are two types of errors which may occur in a communications system: transmission errors and
programming errors. The MODBUS system has specific methods for dealing with either type of error.
Communications errors usually consist of a changed bit or bits within a message. The most frequent cause
of communications errors is noise: unwanted electrical signals in a communications channel. These signals
occur because of electrical interference from machinery, damage to the communications channel, impulse
noise, (spikes), etc. Communications errors are detected by character framing, a parity check, and a
redundancy check.
When the character framing, parity, or redundancy checks detect a communications error, processing of the
message stops. A PLC slave will not act on or respond to the message. (The same occurs if a non-existent
slave address is used.)
When a communications error occurs, the message is unreliable. The PLC slave cannot know for sure if
this message was intended for it. So the CPU might be answering a message which was not its message to
begin with. It is essential to program the MODBUS Master to assume a communications error has occurred
if there is no response in a reasonable time. The length of this time depends upon the baud rate, type of
message, and scan time of the PLC slave. Once this time is determined, the master may be programmed to
automatically retransmit the message.
The MODBUS system provides several levels of error checking to assure the quality of the data
transmission. To detect multibit errors where the parity has not changed, the system uses redundancy
checks: Cyclical Redundancy Check, (CRC), for the RTU mode and Longitudinal Redundancy Check,
(LRC), for the ASCII mode.
CRC-16 Cyclic Redundancy Check
The CRC-16 error check sequence is implemented as described in the following paragraphs.
The message, (data bits only, disregarding start/stop and parity bits), is considered as one continuous binary
number whose most significant bit, (MSB), is transmitted first. The message is pre-multiplied by X**16,
(shifted left 16 bits), then divided by X**16 + X**15 + X**2 + 1 expressed as a binary number
(11000000000000101). The integer quotient digits are ignored and the 16-bit remainder (initialized to all
ones at the start to avoid the case where all zeroes being an accepted message), is appended to the message,
(MSB first), as the two CRC check bytes. The resulting message including the CRC, when divided by the
same polynomial (X**16 + X**15 + X**2 + 1), at the receiver will give a zero remainder if no errors have
occurred. (The receiving unit recalculates the CRC and compares it to the transmitted CRC). All arithmetic
is performed modulo two, (no carries). An example of the CRC-16 error check for message HEX 0207,
(address 2, function 7 or a status request to slave number 2) follows:
The device used to serialize the data for transmission will send the conventional LSB or right-most bit of
each character first. In generating the CRC, the first bit transmitted is defined as the MSB of the dividend.
For convenience then, and since there are no carries used in arithmetic, let’s assume while computing the
CRC that the MSB is on the right. To be consistent, the bit order of the generating polynomial must be
reversed. The MSB of the polynomial is dropped since it affects only the quotient and not the remainder.
This yields 1010 0000 0000 0001, (HEX A001).. Note that this reversal of the bit order will have no effect
whatever on the interpretation or the bit order of characters external to the CRC calculations.