Rainbow Electronics MAX106 - Manual (Page 6)

MAX106
±5V, 600Msps, 8-Bit ADC with On-Chip
2.2GHz Bandwidth Track/Hold Amplifier
6 _______________________________________________________________________________________
Typical Operating Characteristics
(V CC A = V CC I = V CC D = +5.0V, V EE = -5.0V, V CC O = +3.3V, REFIN connected to REFOUT, f S = 600Msps, T A = +25°C, unless other-
wise noted.)
8.00
10 100 1000
EFFECTIVE NUMBER OF BITS vs.
ANALOG INPUT FREQUENCY
(SINGLE-ENDED ANALOG INPUT DRIVE)
MAX106 toc01
ANALOG INPUT FREQUENCY (MHz)
ENOB (Bits)
6.75
6.50
7.25
7.50
7.00
7.75
-6dBFS
-1dBFS
-12dBFS
8.00
10 100 1000
EFFECTIVE NUMBER OF BITS vs.
ANALOG INPUT FREQUENCY
(DIFFERENTIAL ANALOG INPUT DRIVE)
MAX106 toc02
ANALOG INPUT FREQUENCY (MHz)
ENOB (Bits)
6.75
6.50
7.25
7.50
7.00
7.75
-6dBFS
-1dBFS
-12dBFS
SIGNAL-TO-NOISE + DISTORTION
vs. ANALOG INPUT FREQUENCY
(SINGLE-ENDED ANALOG INPUT DRIVE)
MAX106 toc03
ANALOG INPUT FREQUENCY (MHz)
SINAD (dB)
100
35
40
45
50
55
30
10 1000
-1dB FS
-6dB FS
-12dB FS
SIGNAL-TO-NOISE + DISTORTION
vs. ANALOG INPUT FREQUENCY
(DIFFERENTIAL ANALOG INPUT DRIVE)
MAX106 toc04
ANALOG INPUT FREQUENCY (MHz)
SINAD (dB)
100
35
40
45
50
55
30
10 1000
-1dB FS
-6dB FS
-12dB FS
50
10 100 1000
SIGNAL-TO-NOISE RATIO vs.
ANALOG INPUT FREQUENCY
(SINGLE-ENDED ANALOG INPUT DRIVE)
MAX106 toc05
ANALOG INPUT FREQUENCY (MHz)
SNR (dB)
30
38
42
34
46
-1dBFS
-12dBFS
-6dBFS
50
10 100 1000
SIGNAL-TO-NOISE RATIO vs.
ANALOG INPUT FREQUENCY
(DIFFERENTIAL ANALOG INPUT DRIVE)
MAX106 toc06
ANALOG INPUT FREQUENCY (MHz)
SNR (dB)
30
38
42
34
46
-6dBFS
-1dBFS
-12dBFS
Note 12: Total harmonic distortion (THD) is computed from the first five harmonics.
Note 13: Guaranteed by design with a reset pulse width of one clock period or longer.
Note 14: Guaranteed by design. The DREADY to DATA propagation delay is measured from the 50% point on the rising edge of the
DREADY signal (when the output data changes) to the 50% point on a data output bit. This places the falling edge of the
DREADY signal in the middle of the data output valid window, within the differences between the DREADY and DATA rise
and fall times, which gives maximum setup and hold time for latching external data latches.