Rainbow Electronics BR24L16FVM-W - Manual (Page 8)

BR24L16-W / BR24L16F-W / BR24L16FJ-W /
Memory ICs BR24L16FV-W / BR24L16FVM-W
8/25
zDevice operation
1) Start condition (Recognition of start bit)
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All commands are proceeded by the start condition, which is a HIGH to LOW transition of SDA when SCL is HIGH.
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The device continuously monitors the SDA and SCL lines for the start condition and will not respond to any command
until this condition has been met. (See Fig.4 SYNCHRONOUS DATA TIMING)
2) Stop condition (Recognition of stop bit)
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All communications must be terminated by a stop condition, which is a LOW to HIGH transition of SDA when SCL is
HIGH. (See Fig.4 SYNCHRONOUS DATA TIMING)
3) Notice about write command
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In the case that stop condition is not excuted in WRITE mode, transfered data will not be written in a memory.
4) Device addressing
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Following a START condition, the master output the slave address to be accessed.
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The most significant four bits of the slave address are the “device type indentifier”, for this device it is fixed as “1010”.
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The next three bit (P2, P1, P0) are used by the master to select eight 256 word page of memory.
P2, P1, P0 set to ‘0’ ‘0’ ‘0’ - - - - - 1 page (000 to 0FF)
P2, P1, P0 set to ‘0’ ‘0’ ‘1’ - - - - - 2 page (100 to 1FF)
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• •
• •
P2, P1, P0 set to ‘1’ ‘1’ ‘1’ - - - - - 8 page (700 to 7FF)
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The last bit of the stream (R/W - - - READ / WRITE) determines the operation to be performed. When set to “1”, a read
operation is selected ; when set to “0”, a write operation is selected.
R / W set to “0” - - - - - - WRITE (including word address input of Random Read)
R / W set to “1” - - - - - - READ
P2 P1 P0 1010 R / W
5) Write protect (WP)
When WP pin set to V
CC (H level), write protect is set for 2,048 words (all address).
When WP pin set to GND (L level), enable to write 2,048 words (all address).
Either control this pin or connect to GND (or V
CC ). It is inhibited from being left unconnected.