Texas Instruments TMS320DM646X DMSOC User Manual
Page 5
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List of Tables
1
EMIF Pins
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2
Behavior of EM_CS Signal Between Normal Mode and Select Strobe Mode
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3
Description of the Asynchronous Configuration Register (ACFGn)
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4
Description of the Asynchronous Wait Cycle Configuration Register (AWCCR)
..................................
5
Description of the EMIF Interrupt Mask Set Register (EIMSR)
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6
Description of the EMIF Interrupt Mast Clear Register (EIMCR)
....................................................
7
Asynchronous Read Operation in Normal Mode
......................................................................
8
Asynchronous Write Operation in Normal Mode
......................................................................
9
Asynchronous Read Operation in Select Strobe Mode
..............................................................
10
Asynchronous Write Operation in Select Strobe Mode
...............................................................
11
Description of the NAND Flash Control Register (NANDFCR)
......................................................
12
Configuration For NAND Flash
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13
EMIF Interrupt
..............................................................................................................
14
Interrupt Monitor and Control Bit Fields
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15
EMIF Input Timing Requirements
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16
ASRAM Output Timing Characteristics
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17
ASRAM Input Timing Requirement for a Read
........................................................................
18
ASRAM Input Timing Requirements for a Write
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19
ASRAM Timing Requirements With PCB Delays
.....................................................................
20
EMIF Timing Requirements for TC5516100FT-12 Example
........................................................
21
ASRAM Timing Requirements for TC5516100FT-12 Example
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22
Measured PCB Delays for TC5516100FT-12 Example
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23
Configuring A2CR for TC5516100FT-12 Example
....................................................................
24
Recommended Margins
..................................................................................................
25
EMIF Read Timing Requirements
.......................................................................................
26
NAND Flash Read Timing Requirements
..............................................................................
27
NAND Flash Write Timing Requirements
.............................................................................
28
EMIF Timing Requirements for HY27UA081G1M Example
.........................................................
29
NAND Flash Timing Requirements for HY27UA081G1M Example
................................................
30
Configuring A1CR for HY27UA081G1M Example
....................................................................
31
Configuring NANDFCR for HY27UA081G1M Example
..............................................................
32
External Memory Interface (EMIF) Registers
..........................................................................
33
Revision Code and Status Register (RCSR) Field Descriptions
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34
Asynchronous Wait Cycle Configuration Register (AWCCR) Field Descriptions
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35
Asynchronous n Configuration Register (ACFGn) Field Descriptions
..............................................
36
EMIF Interrupt Raw Register (EIRR) Field Descriptions
.............................................................
37
EMIF Interrupt Mask Register (EIMR) Field Descriptions
............................................................
38
EMIF Interrupt Mask Set Register (EIMSR) Field Descriptions
.....................................................
39
EMIF Interrupt Mask Clear Register (EIMCR) Field Descriptions
...................................................
40
NAND Flash Control Register (NANDFCR) Field Descriptions
.....................................................
41
NAND Flash Status Register (NANDFSR) Field Descriptions
.......................................................
42
NAND Flash n ECC Register (NANDECCn) Field Descriptions
....................................................
43
Document Revision History
..............................................................................................
5
SPRUEQ7C – February 2010
List of Tables
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