Quantum 10K II - Manual (Page 333)

Appendix B. SCSI Bus Signal Timing
B–12 Quantum Atlas 10K II Ultra 160/m SCSI Hard Disk Drives
B.5 SCSI Bus Phases
The SCSI communication architecture includes eight distinct phases:
BUS FREE phase
ARBITRATION phase
SELECTION phase
RESELECTION phase
COMMAND phase
DATA (In/Out) phases
STATUS phase
MESSAGE (In/Out) phases
The last four phases are called the “information transfer phases.”
The SCSI bus can never be in more than one phase at any given time. In the
following descriptions, signals that are not mentioned are not asserted.
B.5.1 BUS FREE Phase
The BUS FREE phase indicates that there is no current I/O process and that the
SCSI bus is available for a connection. SCSI devices detect the BUS FREE phase
after the SEL and BSY signals are both false for at least one bus settle delay.
During normal operation, the BUS FREE phase is entered when the drive releases
the BSY signal. However, the BUS FREE phase can be entered following the release
of the SEL signal after a SELECTION or RESELECTION phase time-out.
The BUS FREE phase normally does not begin because of the drive’s release of the
BSY signal unless it has occurred after the detection of a reset condition or after a
drive has successfully transmitted or received one of the following messages:
Messages Transmitted from Drive:
•
DISCONNECT
• COMMAND COMPLETE
Messages Received by Drive:
•
ABORT TASK
• ABORT TASK SET
• TARGET RESET
• RELEASE RECOVERY
• CLEAR QUEUE
If an initiator detects the release of the BSY signal by the drive at any other time,
the drive is indicating an error condition to the initiator. The drive can perform this
transition to the BUS FREE phase independently of the state of the ATN signal. The
initiator manages this condition as an unsuccessful I/O process termination. The
drive terminates the I/O process by clearing all pending data and status information
for the affected nexus. The drive can optionally prepare sense data that can be
retrieved by a REQUEST SENSE Command.
Bus Free Sequence
1. BSY and SEL signals are continuously false for one bus settle delay.