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Pex8605, 3 power, ground pin connections, Core logic, serdes, and pll power pins – Avago Technologies PEX 8605 User Manual

Page 2

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PEX8605

© PLX Technology, www.plxtech.com

Page 2 of 13

2 May 2013, version 1.7

2.3 Power, Ground Pin Connections

Signal Name Dual-Row

QFN Pkg.
Pin #

TQFP
Package
Pin #

Signal
Type

Checked

Recommendations

IO Power Pins (2.5 or 3.3 V)

In the simplest applications, all pins in this group
can be powered from a common 2.5 V or 3.3 V
DC voltage source. All pins in this group must be
at the same voltage. See the PEX8605 RDK
schematic for a reference circuit, including
recommended bypass cap network.PEX8605

PEX_VDDA_P0

PEX_VDDA_P1

PEX_VDDA_P2

PEX_VDDA_P3

B8

B13

B44

B50

14

26

101

114

APWR

YES

NO

UNKNOWN

Power for SerDes Analog Circuits (4 Pins)

Power for these pins should be filtered from the
main IO supply, VDD_IO. See the PEX8605
RDK schematic for a reference circuit.

Note: If stand-by power (D3cold) is implemented,
power for these pins should be filtered from the
auxiliary power supply, VAUX_IO.

VDD_IO

A30, A43, B3,

B31, B41

3, 4, 56, 70,

84, 92

IOPWR

YES

NO

UNKNOWN

Power for Digital IO Circuits (5 Pins)

Main supply for digital IO circuits.

Important Note: Data Sheet version 1.2 corrects
pins A26 and B19 as VAUX_IO. Designs
powering VDD_IO and VAUX_IO supplies
separately may be impacted by this change.

VAUX_IO

A18, A26, A64,

B19

33, 42, 49, 127

IOPWR

YES

NO

UNKNOWN

Auxiliary Power Supply (4 Pins)

If stand-by power is implemented, this power
supply should be derived from Vaux (3.3V).
Otherwise, connect these pins to the VDD_IO
supply.

Core Logic, SerDes, and PLL Power Pins

In the simplest applications, all 1.0 V supply pins
can be powered from a common 1.0 V DC voltage
source. See the PEX8605 RDK schematic for a
reference circuit.

PEX_VDDD0_P0

PEX_VDDD0_P1

PEX_VDDD0_P2

PEX_VDDD0_P3

PEX_VDDD1_P0

PEX_VDDD1_P1

PEX_VDDD1_P2

PEX_VDDD1_P3

B7

B12

B45

B51

A7

A13

B46

B52

12

24

103

116

9

21

106

119

DPWR

YES

NO

UNKNOWN

1.0 V Power for SerDes Digital Circuits (8

Pins)

Power for these pins should be filtered from the
main 1.0 V supply, VDD_CORE. See the PEX
8603 RDK schematic for a reference circuit.

Note: If stand-by power (D3cold) is implemented,
power for these pins should be filtered from the
auxiliary power 1.0V supply, VAUX_CORE.