Avago Technologies PEX 8605 - Manual (Page 13)

PEX8605
© PLX Technology, www.plxtech.com Page 13 of 13 2 May 2013, version 1.7
8. Match left/right turn bends where possible. No 90-degree bends or "tight" bend structures.
9. The reference clock signal pair should maintain the same reference plane for the entire routed length and should not
cross any plane splits (breaks in the reference plane)
10. Reference clock terminating components should be placed as close as possible to their respective driving sources,
ideally within 100 mils of the clock/receiver component pin/pin.
11. Match all segment lengths between differential pairs along the entire length of the pair.
12. Maintain constant line impedance along the routing path by keeping the same line width and line separation.
13. Avoid routing differential pairs adjacent to noisy signal lines or high speed switching devices such as clock chips.
14. Recommended reference clock differential pair spacing (clock to clock#) ≤ 11.25 mils.
15. Recommended reference clock trace spacing to other traces is ≥ 20 mils.
16. Recommended reference clock line width ≥ 5 mils.
17. When routing the 100MHz differential clock, do not divide the two halves of the clock pair between layers.
18. Recommended reference clock differential impedance: 85 Ω ± 15%
19. Recommended PCI Express reference clock to PCI express reference clock length matching to within 25 mils
20. AC Coupling Capacitors: The same package size and value of capacitor should be used for each signal in a
differential pair. Refer to the PCI Express Base Specification for permitted values.
21. AC Coupling Capacitors: Locate capacitors for coupled traces in a differential pair at the same location along the
differential traces. Place them as close to each other as possible.
22. AC Coupling Capacitors: The "breakout" into and out of the capacitor mounting pads should be symmetrical for
both signal lines in a differential pair. In addition, the area under the cap footprint should be voided of metal.
23. Test points and probing structures should not introduce stubs on the differential pairs.
24. Use Low ESR, ceramic caps for lane AC-coupling.
4 Assembly Guidelines for aQFN Packages
PEX8605 assembly guidelines are provided in an application note entitled “aQFN Surface Mount Application
Note”. This document is available for download in the PEX8605 web toolbox,
www.plxtech.com/pex8605 .
This document covers important points for proper assembly of aQFN packages, including center pad layout,
stencil design, and assembly process steps. Designers should review these procedures with their assembly
house to insure reliable PCB assembly.