Sundance SMT398VP - Manual (Page 33)

8.1.2. Speed qualification tests
• QDRII memory accesses at 200MHz.
Both banks were tested at various frequencies from 125MHz to 200MHz for read/write
operations. Walking one/zero, test patterns, on address and data busses.
Burst mode is not tested (during the tests the same data is provided during the 2 clock
periods of a write access).
Board passed the qualification tests.
• RSL Tx/Rx at 2.5Gbits/s
Bert test run at 2.5 Gbits/s.
Board passed qualification tests.
• Programming clock synthesiser:
Making sure that the clock synthesiser can be used to clock the MGTs and run the BERT
test: tests the jitter tolerance.
The maximum frequency targeted was 200Mhz.for clocking the QDRII memory accesses.
The board passed the qualification tests.
8.1.3. Integration qualification tests
• The board can work on ALL Sundance platforms as a root TIM module or as part of
a network of TIMs on carriers.
Document No.
S M T 3 9 8 V P - D 0 0 0 0 5 8 H - g u i d e . d o c
Revision
2 . 4 . 2
Date
0 8 / 0 2 / 0 7
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