beautypg.com

Features, The smt398vp tim, Smt398vp diagram – Sundance SMT398VP User Manual

Page 11: Smt398vp, Figure 1: block diagram, Fpga, Page 11 of 34

background image

4. FEATURES

4.1.

THE SMT398VP TIM

This module conforms to the TIM standard (Texas Instrument Module, See

TI TIM

specification & user’s guide

) for single width modules.

It sits on a carrier board.

The carrier board provides power, Ground, communication links (ComPort links, RSL links)
between all the modules fitted and a pathway to the host, for a non stand-alone system.

The SMT398VP requires an additional 3.3V power supply (as present on all Sundance TIM
carrier boards), which must be provided by the two diagonally opposite mounting holes.

4.1.1. SMT398VP Diagram

Figure 1 shows a simplified version of the SMT398VP module.

2

x

Com

por

ts/

S

D

L

24

I

/O

pi

ns

In

te

rr

u

p

ts&

R

e

s

e

t

5 I

/O

p

in

s

4x

Co

m

m

-P

o

rt

/SDL

48

I

/O

pi

ns

FPGA

Virtex-II Pro FF1517

XC2VP70

852 to 964 I/O Pins

1.5V Core

1.5V/3.3V I/O

Xilinx Coolrunner II

CPLD XC2C128VQ100

on Comport[0;3] and

Config&control

JTAG Header

J1 Top Primary TIM

Connector

Comport 0 & 3

J2 Bottom Primary TIM

Connector

4xComport/SDL 1;2;4 & 5

4 LEDs or

4 I/O pins

JTAG

JT
A

G

208 I/O pins; 36-bit data

4 Mbytes QDR II-SRAM

2x (512kx36)

16 I/O pins

20 differential pairs

40 TTL IOs

Sundance Low

voltage Bus (1 Conn.)

16 RocketIO links

Sundance Rocket io

Serial Link (4 Conn.)

120 I/O pins

Sundance High

speed Bus (2 Conn.)

50MHz

Oscillator

Clock

Synthesizer

PROM

XCF32PVO48

25MHz
Crystal

External

clock

MMCX

(optional)

Figure 1: Block Diagram

Document No.

S M T 3 9 8 V P - D 0 0 0 0 5 8 H - g u i d e . d o c

Revision

2 . 4 . 2

Date

0 8 / 0 2 / 0 7

Page 11 of 34