Sundance SMT351T - Manual (Page 15)

SMT351T User Guide Page 15 of 37 Last Edited: 04/09/2009 11:26:00
Figure 3: FPGA connections to DDR2SDRAM
Xilinx MIG utility:
The Memory controllers generated by MIG1.72 and MIG2.0 have been successfully running at
200MHz.
The pinout was not generated using MIG2.0 but the controllers generated by MIG2.0 can be
used with the SMT351T pinout. Also see Xilinx
24H24HH
AR#29313
H
Xilinx issue bug fixes for their designs, and the controllers generated by MIG2.0 are not
exempt.
Please read these 2 answer records from Xilinx:
H
AR#30410
H
and
H
AR#29783
H
and for simulation:
H
AR#29478
H
The devices used are Micron
25H25HH
DDR2SDRAM 1Gbit
H
(MT47H64M16BT-37E) or
25H25HH
DDR2SDRAM 2Gbit
H
(MT47H128M16BT-37E) devices
H27H27HHTUUTHH.
4x
com
po
ne
nts
4x
com
po
ne
nts