Sundance SMT351T - Manual (Page 14)

SMT351T User Guide Page 14 of 37 Last Edited: 04/09/2009 11:26:00
4.2.7 FPGA Bitstream formatting
If you generated you FPGA bitstream using Diamond FPGA, you do not need any other handling.
The .app file created can be used as is to configure the FPGA.
If you used Xilinx ISE and created a .bit file, you need to use the Sundance executable
“Getrawdata.exe” provided for free in the SMT6001 package.
Please read the SMT6001 help file at chapter: “Saving FPGA configuration data to file”.
The resulting file can be used as is to configure the FPGA.
4.2.8 DDR2SDRAM
There are 8 devices of DDR2 SDRAM connected to the FPGA providing up to 2GBytes of
storage.
The devices are grouped in two independent banks. The two banks are identical so we will
discuss only one.
A bank is made of four devices. Within a bank the devices share the same address and control
bus.
The data bus of each device is routed to the FPGA. This allows accessing all the chips in
parallel, at the same time.
The DDR2 memory runs at 200MHz with of the shelf controllers form MIG tools, but higher
performances can be reached if the designs are optimised.
Depending on the FPGA and design implemented, performances might vary.
Each bank is fully independent with separate address, control and data busses and arranged as
follows: