Sundance SMT351T User Manual
Page 10
SMT351T User Guide
Page 10 of 37
Last Edited: 04/09/2009 11:26:00
4.2 Module Description
Figure 1 presents colour coded blocks regrouping components according to their functionality or
their nature.
The following paragraphs will detail each one of them, but first, here is a global description of each
block.
• Block1 and
Block6
Xilinx Virtex 5 XC5VSXT/LXT and configuration scheme for the FPGA.
• Block2: DDR2SDRAM memory banks.
• Block3: IO connectors for general purpose or dedicated interfaces.
• Block4: 50MHz or 125MHz clocks.
• Block5: LEDs for development and in-use monitoring and general purpose use.
4.2.1 FPGA
Xilinx Virtex 5 XC5VSX50T, XC5VLX50T, XC4VSX95T or XC5VLX110T FPGA.
This device is packaged in a FF1136-pin BGA package.
4.2.2 CPLD
Xilinx Coolrunner II device
H19H19HHTU
XC2C256-7CP132C
UTHH
.
This device is packaged in a 132-ball BGA type package with a -7 speed grade.
It can be used to configure the FGPA via Comport 3, or from a configuration stored in flash
memory.
The flash memory is programmed using the CPLD and via the ComPort3.
4.2.3 FLASH MEMORY
20H20HH
S29GL256N11TFI01
H
is a 256Mbit flash from Spansion.
It can be used to configure the FPGA at power up.
Flash accessed using Comport3 via the CPLD.
Flash programming selection via switch SW1 (See
X87H87H
Table 3
X
)
Software Library Support available from Sundance.
The code can run on Sundance DSP TIM or a Host.
All the flash functionalities are available.