Measurement Computing 2000 Series Daqboar - Manual (Page 51)

DaqBoard/2000 Series & /2000c Series User’s Manual 10-18-02 Daq Systems and Device Overviews 1-25
Voltage Specifications
(one year, 0-35°C)
Applicable to DaqBoard/2000, /2001, /2005, /2000c, /2001c, and /2005c
Differential Nonlinearity:
±2 LSB maximum
Integral Nonlinearity: ±1 LSB maximum
Temperature Coefficient: ±(10 ppm + 0.3 LSB)/°C typical
Input Impedance: 10 M
Ω (single ended); 20 MΩ (differential), in parallel with 50 pF
Bias Current: <1 nA (0 to 35°C)
Common Mode Rejection: 86 dB typical, from DC to 60 Hz for gains
≤8; 95 dB typical, from DC to 60
Hz for gains ≥16
Hostile Channel-to-channel Crosstalk: 100 dB DC to 60 Hz; 86 dB @10 kHz
Maximum Input Voltage: ±11 V relative to analog common
Over-Voltage Protection: ±35 V relative to analog common
Input Sequencer
Applicable to DaqBoard/2000, /2001, /2002, /2004, /2005, /2000c, /2001c, /2004c, and /2005c
Analog, digital and counter inputs can be scanned synchronously based either on an internal
programmable timer, or an external clock source. Analog and digital outputs can also be
synchronized to either of these clocks. Bus Mastering DMA is utilized to provide CPU and system-
independent data transfers, insuring data acquisition performance irrespective of other system
activities.
Scan Clock Sources: 2
1. Internal, programmable from 5
µs to 5.96 hours maximum in 5 µs steps
2. External, TTL level input up to 200 kHz maximum
Programmable parameters per scan: channel (random order), gain, unipolar/bipolar
Depth: 512 locations
On-board Channel to channel scan rate: 5 or 10
µs per channel, programmable
Expansion channel scan rate: 5 or 10
µs per channel, programmable
External Acquisition Scan Clock Input
Applicable to DaqBoard/2000, /2001, /2005, /2000c, /2001c, and /2005c
Maximum rate: 200 kHz
Signal Range: 0V to +5V
Input Characteristics: 100
Ω series, 20 pF to common and 10 kΩ to +5V
Input protection: ±8 kV ESD clamp diodes parallel
Trigger Level: TTL
Slew Rate Requirement: 14 V/
µs minimum
Minimum pulse width: 50 ns high, 50 ns low
Triggering
Applicable to DaqBoard/2000, /2001, /2005, /2000c, /2001c, and /2005c
Trigger Sources: 6, individually selectable for starting and stopping an acquisition. Stop acquisition
can occur on a different channel than start acquisition; stop acquisition can be triggered via modes 2,
4, 5, or 6 described below. Pre-trigger is supported with fixed or variable pre-trigger periods.
Single-Channel Analog Hardware Trigger: Any analog input channel can be software programmed
as the analog trigger channel, including any of the 256 analog expansion channels.
Input Signal Range: Anywhere within range of the selected input channel
Trigger level: Programmable (11-bit resolution), including “window triggering.”
Hysteresis: Programmable (11-bit resolution)
Latency: 5 µs maximum