Foxconn NFPIK8AA-8EKRS - Manual (Page 59)

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Chapter 3 BIOS Description
its charge before DRAM refresh, refreshing may be incomplete and DRAM may
fail to retain data. This item applies only when synchronous DRAM is installed
in the system.
Row cycle Time (Trc) (Default: 12T)
This item is used to set Row cycle time.
Bottom of 32-bit [31:24] IO (Default: D0)
This item is used to set Bottom of 32-bit [31:24] IO.
S/W memory hole Remapping (Default: Disabled)
This item is used to enable or disable the S/W memory hole remapping.
MTRR mapping mode (Default: Continuous)
This item is used set MTRR mapping mode. The setting values are: Continu-
ous and Discrete.
DRAM ECC feature control (Default: Disabled)
This item is used to enable or disable the DRAM ECC feature control.
ECC memory Interlock (Default: At least One)
This item controls is used to set ECC memory Interlock. The setting values are:
At least One and All are.
ECC MCE enable (Default: Disabled)
This item is used to enable or disable ECC MCE enable.
Chip-Kill mode enable (Default: Disabled)
This item is used to enable or disable the Chip-Kill mode enable.
ECC Redirection (Default: Disabled)
This item is used to enable or disable ECC Redirection.
DRAM/L2 cache/DCache background scrubber (Default: Disabled)
This item is used to set the DRAM/L2 cache/DCache background scrubber.
The setting values are: Disabled and 40.0ns.