Comtech EF Data DD2401 User Manual

Page 46

User Interfaces

DD2401 Satellite Demodulator

MN-DD2401 - Rev. G

<1>

<4>

<2>

<4>

<2>

<1>

Latched Alarm 3

Latched Alarm 4

Latched Comm.
Alarm

Reserved

Error Counter

Test 2047 Error
Counter

Raw BER
Mantissa

Corrected BER
Mantissa

Eb/No

Offset Frequency

Test 2047
Mantissa

Raw BER
Exponent

Corrected BER

(0 = Pass, 1 = Fail)

Bit 0 = IF Synthesizer Lock Detect Fault
Bit 1 = Rx Oversample PLL Lock Detect Fault
Bit 2 = Buffer Clock PLL Lock Detect Fault
Bit 3 = Viterbi Decoder Lock Fault
Bit 4 = Sequential Decoder Lock Fault
Bit 5 = Rx 2047 Test Pattern Lock Fault
Bit 6 = External Reference PLL Lock Fault
Bit 7 = Frame Sync Fault
(0 = Pass, 1 = Fail)

Bit 0 = Buffer Clock Activity Detect Fault
Bit 1 = External BNC Activity Detect Fault
Bit 2 = Rx Satellite Clock Activity Detect Fault
Bit 3 = External Reference PLL Activity Fault
Bit 4 = High Stability Activity Detect Fault
Bit 5 = High Stability PLL Fault
Bit 6 = Eb/No Threshold Fault
Bit 7 = Spare
(0 = Pass, 1 = Fail)

Bit 0 = -12 V Alarm
Bit 1 = +12 V Alarm
Bit 2 = +5 V Alarm
Bit 3 = Temperature
Bit 4 = Interface FPGA Fault
Bit 5 = Battery Fault
Bit 6 = RAM/ROM Fault
Bit 7 = Spare
(0 = Pass, 1 = Fail)

Ignore

Unsigned Binary Value

Unsigned Binary Value

Bytes 1 - 2 = Unsigned Binary Value Raw BER

Bytes 1 - 2 = Unsigned Binary Value Corrected BER

Unsigned Binary Value, 2 Decimal Places Implied

Unsigned Binary Value in Hz, Pos/Neg Indicated Below

Bytes 1 - 2 = Unsigned Binary Value Test 2047 BER

Byte 3 = Unsigned Binary Value Exponent

Byte 3 = Unsigned Binary Value Exponent