Artesyn MVME4100 Single Board Computer Installation and Use (June 2014) - Manual (Page 79)

Functional Description
MVME4100 Single Board Computer Installation and Use (6806800H18G) 79
4.13 Clock Distribution
The clock function generates and distributes all of the clocks required for system operation.
The PCI-E clocks are generated using an eight output differential clock driver. The PCI/PCI-X bus
clocks are generated by the bridge chips from the PCI-E clock. Additional clocks required by
individual devices are generated near the devices using individual oscillators. For clock
assignments, refer to the MVME4100 Single Board Computer Programmer’s Reference manual.
4.13.1 System Clock
The system clock is driven by an oscillator. The following table defines the clock frequencies.
4.13.2 Real Time Clock Input
The RTC clock input is driven by a 1 MHz clock generated by the Control and Timers PLD. This
provides a fixed clock reference for the MPC8548E PIC timers which software can use as a
known timing reference.
4.13.3 Local Bus Controller Clock Divisor
The Local Bus Controller (LBC) clock output is connected to the PLD but is not used by the
internal logic.
4.14 Reset Control Logic
There are multiple sources of reset on the MVME4100. The following sources generate a board
level reset:
 Power-up
 Reset switch
Table 4-1 Clock Frequencies
SYSCLK Core MPX (Platform) DDR2
66.67 MHz 1.3 GHz 533 MHz 266 MHz