Aplex Technology OPC-5127 - Manual (Page 38)

OPC-5XX7 User Manual 38
CPU C State Capability [C1] CPU Power-saving State Control
Execute Disable Bit [Enable] (Virus Protection Technology)
Hard Disk Boot Priority (IDE Storage Device Boot Priority)
This item is used to specify boot priority of IDE devices. Press "Enter" key for detailed setting.
Virus Warning
This item has two options: "Disabled" and "Enabled".
CPU L1 & L2 Cache
This item can be used to enable or disabl
e the CPU’s primary (L1) or secondary (L2) cache. If set
to Enabled, operating speed of PC will be increased remarkably; if set to Disabled, the function will be
inactivated.
Hyper-Threading Technology
Enable and disable Intel's hyper-threading technology.
Quick Power On Self Test
This item is used to accelerate Power On Self Test (POST) process. If set to Enabled, BIOS will
shorten or skip some of its tests.
Enabled (default) Quick POST
Disabled Normal POST
First/Second/Third/Boot Other Device
BIOS will load the operating system according to the boot order of available devices. If disabled,
the function will be inactivated.
Boot Up NumLock Status (Default: On)
On (default) Keypad numeric keys remain valid
Off Keypad arrow keys remain valid
Gate A20 Option
Normal Gate A20 signal is controlled by keyboard controller or chipset hardware.
Fast (default) Gate A20 signal is controlled by port 92 or specific programs of chipset.
APIC Mode
It refers to an advanced interrupt controller mode to meet the requirements of multi-core CPU.
MPS Version Control For OS
This item is used to specify the multiprocessor specification version of the system. It is
recommended to keep the default value (1.4).