Altera Nios II - Manual (Page 12)

2–4 Chapter 2: Using the Flash Programmer GUI
Starting the Flash Programmer GUI
Nios II Flash Programmer User Guide © March 2014 Altera Corporation
To save your current flash programmer settings, on the File menu, click Save or Save
As
to update or create a .flash-settings file. After you save the file, you can continue
to edit it in the Nios II Flash Programmer GUI.
To open a pre-existing flash programmer settings file, on the File menu, click Open,
and navigate to the location of the existing .flash-settings file.
Setting the Hardware Connection
This section describes how to select the correct download cable, device, and processor
to program flash memory. If your system has only a single download cable and a
single processor, the process is simple. This section describes all the steps for a system
with multiple download cables, processors, and devices.
Before you can program flash memory on your board, you must configure your FPGA
with a flash programmer target design that contains at least the minimum component
set specified in
Table 1–1 on page 1–3 .
f For instructions to configure the FPGA, refer to the Quartus II Programmer chapter in
volume 3 of the Quartus II Handbook.
After you load the target design on your FPGA, you can set the hardware connection
for programming flash memory.
To set the Hardware connection, perform the following steps:
1. Click Hardware Connections. The Hardware Connections dialog box appears.
2. In the Hardware Connections dialog box, click Refresh Connections.
3. If you are reusing an .flash-settings file, and the Quartus ® II project has been
recompiled since the .flash-settings file was created or the Name column entries
in the Processors list are blank, perform the following steps:
a. Under JTAG Debugging Information File name, browse to locate your project
JTAG Debugging Information File (.jdi).
b. Click Resolve Names. The flash programmer uses the .jdi file to ensure the
available connection information is accurate.
4. If your design has multiple download cables, select the appropriate cable.
5. If your design has multiple processors, select the Nios II processor that
corresponds to the CPU to program flash value under Target hardware
information
in the Nios II Flash Programmer dialog box.
6. Click Close.
Checking System ID and System Timestamp
If your flash programmer target design includes a System ID component, the Nios II
Flash Programmer can perform system ID and system timestamp checking before
programming flash memory. If the flash programmer performs system ID checking,
system timestamp checking, or both, and the expected system is not configured in the
FPGA, the flash programmer does not program the flash memory.