Altera OCT - Manual (Page 9)

Termination can exist on input and output buffers and sometimes simultaneously.
There are two methods to associate pin groups with an OCT block:
• Use a .qsf assignment to indicate which pin (bus) is associated with which an OCT block. You can either
use the TERMINATION_CONTROL_BLOCK assignment, which will associate a pin with an OCT
instantiated in the RTL, or use the RZQ_GROUP assignment, which will associate the pin with a newly
created OCT without modifying the RTL.
• Instantiate the I/O buffer primitives at the top level and connect them to the appropriate OCT blocks.
All I/O banks with the same VCCIO can share one OCT block, even if that particular I/O bank
has its own OCT block. You can connect any number of I/O pins that support calibrated
termination to an OCT block. Ensure that you connect I/Os with compatible configuration to an
OCT block. You must also ensure that the OCT block and its corresponding I/Os have the same
VCCIO and series/parallel termination values. Then, the Fitter places the I/Os and OCT block in
the same column. The Quartus
®
II software generates warning messages if there is no pin connected
to the block.
Note:
Design Example
The Altera OCT megafunction can generate a design example that matches the same configuration chosen
for the megafunction. The design example is a simple design that does not target any specific application;
however you can use the design example as a reference on how to instantiate the megafunction.
The .qsys files are for internal use during example design generation only. You cannot edit the files. Note:
The Altera OCT megafunction does not support VHDL generation. Note:
Generating Design Example
During generation, the Generation dialog box displays the option to generate a design example. Turn on
the Generate Example Design option.
The software generates the _example_design directory along with the megafunction, where
is the name of your megafunction.
The _example_design directory contains the - make_qii_design.tcl TCL scripts.
Generating Quartus Design Example
The make_qii_design.tcl generates a synthesizable design example along with a Quartus project,
ready for compilation.
To generate synthesizable design example, run the following script at the end of megafunction generation:
quartus_sh -t make_qii_design.tcl
To specify an exact device to use, run the following script:
quartus_sh -t make_qii_design.tcl [device_name]
Altera Corporation Altera OCT Megafunction User Guide
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9 Design Example
ug-altera_oct
2013.11.29