Altera OCT - Manual (Page 4)

Figure 2: OCT Logic
I/O Block
OCT Logic Block
Serial to
Parallel Shift
Logic
I/O Block
ser_data
clk
0
10
enser[11:0]
0 1
Clock
R
R
R
R
USRMODE
S2PLOAD#
serial_load_en S2PLOAD
I/O 1 I/O 2
parallelterminationcontrol
seriesterminationcontrol
IOCSR
16
16
The OCT block serially sends the calibration code words to the OCT logic through the ser_data ports.
The enser signal specifies which OCT block to read the calibration code words from when triggered. The
calibration code words are then buffered into the serial-to-parallel shift logic. Then, the Altera OCT
megafunction asserts the S2PLOAD signal to send the calibration code words in parallel to the I/O buffers.
The calibration code words either activate or deactivate the transistors in the I/O block which will emulate
series or parallel resistance to match the impedance.
Functional Description
To meet DDR memory specification, Arria 10 devices support on-chip series termination (R
S
OCT) and
on-chip parallel termination (R
T
OCT) for single-ended I/O standards. OCT can be supported on any I/O
bank. VCCIO must be compatible for all I/Os in a given bank.
An Arria 10 device consists of one OCT block in each x48 I/O tile. Each OCT block requires an external
240Ω reference resistor associated with it through an RZQ pin. An RZQ pin shares the same VCCIO supply
with the I/O bank where it is located. An RZQ pin is a dual function I/O pin that you can use as a regular
I/O if OCT calibration is not used. When used for OCT calibration, the RZQ pin connects the OCT block
to ground through an external 240Ω resistor.
The following figures show how OCTs are connected in a single I/O column (in a daisy chain). An OCT can
calibrate an I/O belonging to any tile, as long as the tile is in the same column and meets the voltage
requirements. Because there are no connections between columns, OCT can only be shared if the pins belong
to the same I/O column of the OCT.
Altera OCT Megafunction User Guide Altera Corporation
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Functional Description 4
2013.11.29