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ADLINK ASD8P-MT1 Series User Manual

Page 24

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Page 24 of 43

ASD8P-MT1 Specification

To exit L1, the device must assert CLKREQ# (low) to re-enable the reference clock. After the

device asserts CLKREQ# (low) it must allow that the reference clock will continue to be in the

parked clock state for a delay (TCRLon) before transitioning to the active clock state. The time

that it takes for the device to assert CLKREQ# and for the system to return the reference clock to

the active clock state are serialized with respect to the remainder of L1 recovery. This time must

be taken into account when the device is reporting its L1 exit latency.

When the PCI Express device supports, and is enabled for, Latency Tolerance Reporting (LTR),

the device must allow that the reference clock transition to the active clock state may be

additionally delayed by the system up to a maximum value consistent with requirements for the

LTR mechanism. During this delay, the reference clock must remain parked. When exiting the

parked state following the delay, the clock must be stable and valid within 400 ns.

Clock Request Support Reporting and Enabling

Support for the CLKREQ# dynamic clock protocol should be reported using bit 18 in the PCI

Express link capabilities register (offset 0C4h). To enable dynamic clock management, bit 8 of the

Link Control register (offset 010h) is provided. By default, the card shall enable CLKREQ#

dynamic clock protocol upon initial power up and in response to any warm reset by the host

system. System software may subsequently disable this feature as needed. Refer to the PCI

Express Base Specification, Revision 1. 1 (or later) for more information regarding these bits

PERST# Signal

• The PERST# signal is de-asserted to indicate when the system power sources are within

their specified voltage tolerance and are stable.

• PERST# should be used to initialize the card functions once power sources stabilize.

• PERST# is asserted when power is switched off and also can be used by the system to

force a hardware reset on the card.

• System may use PERST# to cause a warm reset of the add-in card.