3 pin locations and signal descriptions, 1 pin locations, 2 m. 2 socket definition – ADLINK ASD8P-MT1 Series User Manual
Page 19: Pin locations and signal descriptions
ASD8P-MT1 Specification
Page 19 of 43
3 Pin Locations and Signal Descriptions
3.1 Pin
Locations
The data and power connector pin locations of the ASD8P-MT1 PCIe SSD Gen2 x 2 Lane are
shown below. This M. 2 device contains Socket 2 + B-M key.
3.2 M. 2 Socket Definition
The PCI Express interface supported in Socket 3 is a 4 Lane PCI Express interface intended for
premium SSD devices that need this sort of host interface. This Socket can also support SSD
devices that make use of only 2 Lane PCI Express and are also able to be plugged in Socket 2
with 15 the aid of a Dual Notch.