ADLINK PCI-7442 - Manual (Page 58)

46 Register Format
1: Clear WDT interrupt
0: No effect
Bit3 WSOE: WDT Safety DO Send Out Enable
1: Enabled
0: Disabled
Address: BASE+0x8Ah
Reset Value: 0x0000h
Read/Write: R
-- ARDYS SRDYS RBRDYS SOES WIS WDTES HRHES
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
-- -- -- -- -- -- -- --
Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 Bit8
Bit15 - 7 Not used
Bit0 HRHES: Hot Reset Hold Enable Status
1: Enabled
0: Disabled
Bit1 WDTES: WDT Interrupt Enable Status
1: Enabled
0: Disabled
Bit2 WIS: WDT interrupt status
1: WDT interrupt does not assert
0: WDT interrupt asserts
Bit3 SOES: Safety Out Enable Status
1: Enabled
0: Disabled
Bit4 RBRDYS: DO Read Back Data Ready Status
1: Not ready
0: Ready
Bit5 SRDYS: DO Data Sending Finished Status
1: Not finished
0: Finished
Bit6 ARDYS: Flash Data Read/Write Finished Status
1: Not finished
0: Finished