Cypress CY7C1012DV33 - Manual (Page 7)

CY7C1012DV33
Document Number: 38-05610 Rev. *D Page 7 of 11
Figure 5. Write Cycle No. 1 (CE Controlled)
[3, 16, 17]
Figure 6. Write Cycle No. 2 (WE Controlled, OE HIGH During Write) [3, 16, 17]
Figure 7. Write Cycle No. 3 (WE Controlled, OE LOW)
[3, 17]
Switching Waveforms
(continued)
t
WC
DATA VALID
t
AW
t
SA
t
PWE
t
HA
t
HD
t
SD
t
SCE
t
SCE
CE
WE
DATA I/O
ADDRESS
t
HD
t
SD
t
PWE
t
SA
t
HA
t
AW
t
SCE
t
WC
t
HZOE
DATA
IN
VALID
CE
ADDRESS
WE
DATA I/O
OE
NOTE 18
DATA VALID
t
HD
t
SD
t
LZWE
t
PWE
t
SA
t
HA
t
AW
t
SCE
t
WC
t
HZWE
CE
ADDRESS
WE
DATA I/O NOTE 18
Notes
16. Data I/O is high impedance if OE = V
IH
.
17. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high impedance state.
18. During this period, the I/Os are in output state. Do not apply input signals.
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