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Software controlled store and recall cycle, Switching waveforms – Cypress CY14B108M User Manual

Page 22

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PRELIMINARY

CY14B108K, CY14B108M

Document #: 001-47378 Rev. **

Page 22 of 29

Software Controlled STORE and RECALL Cycle

In the following table, the software controlled STORE and RECALL cycle parameters are listed.

[27, 28]

Parameters

Description

20 ns

25 ns

45 ns

Unit

Min

Max

Min

Max

Min

Max

t

RC

STORE/RECALL Initiation Cycle Time

20

25

45

ns

t

SA

Address Setup Time

0

0

0

ns

t

CW

Clock Pulse Width

15

20

30

ns

t

HA

Address Hold Time

0

0

0

ns

t

RECALL

RECALL Duration

200

200

200

μs

t

SS

[31, 32]

Soft Sequence Processing Time

100

100

100

μs

Switching Waveforms

Figure 13. CE and OE Controlled Software STORE and RECALL Cycle

[28]

Figure 14. AutoStore Enable and Disable Cycle

t

RC

t

RC

t

SA

t

CW

t

CW

t

SA

t

HA

t

LZCE

t

HZCE

t

HA

t

HA

t

HA

t

DELAY

t

STORE

/t

RECALL

t

HHHD

t

LZHSB

High Impedance

Address #1

Address #6

Address

CE

OE

HSB (STORE only)

DQ (DATA)

RWI

t

RC

t

RC

t

SA

t

CW

t

CW

t

SA

t

HA

t

LZCE

t

HZCE

t

HA

t

HA

t

HA

t

DELAY

Address #1

Address #6

Address

CE

OE

DQ (DATA)

t

SS

Notes

27. The software sequence is clocked with CE controlled or OE controlled reads.
28. The six consecutive addresses must be read in the order listed in

Table 2

. WE must be HIGH during all six consecutive cycles.

29. This is the amount of time it takes to take action on a soft sequence command. Vcc power must remain HIGH to effectively register command.
30. Commands such as STORE and RECALL lock out I/O until operation is complete which further increases this time. See the specific command.

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