Cypress CY62128B - Manual (Page 6)

CY62128B
MoBL
®
Document #: 38-05300 Rev. *C Page 6 of 11
Read Cycle No. 2 (OE Controlled)
[13, 14]
Write Cycle No. 1 (CE
1
or CE
2
Controlled)
[15, 16]
Notes:
14. Address valid prior to or coincident with CE
1
transition LOW and CE
2
transition HIGH.
15. Data I/O is high impedance if OE = V
IH
.
16. If CE
1
goes HIGH or CE
2
goes LOW simultaneously with WE going HIGH, the output remains in a high-impedance state.
Switching Waveforms (continued)
50% 50%
DATA VALID
t
RC
t
ACE
t
DOE
t
LZOE
t
LZCE
t
PU
HIGH IMPEDANCE
t
HZOE
t
HZCE
t
PD
HIGH
OE
CE
1
I
CC
I
SB
IMPEDANCE
ADDRESS
CE
2
DATA OUT
V
CC
SUPPLY
CURRENT
t
WC
DATA VALID
t
AW
t
SA
t
PWE
t
HA
t
HD
t
SD
t
SCE
t
SCE
CE
1
ADDRESS
CE
2
WE
DATA I/O
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