Cypress CY62137FV30 - Manual (Page 4)

CY62137FV30 MoBL
®
Document Number: 001-07141 Rev. *F Page 4 of 12
Thermal Resistance
Tested initially and after any design or process changes that may affect these parameters .
Parameter Description Test Conditions VFBGA TSOP II Unit
Θ
JA
Thermal Resistance
(Junction to Ambient) Still air, soldered on a 3 × 4.5 inch,
two layer printed circuit board 75 77
°C/W
Θ
JC
Thermal Resistance
(Junction to Case) 10 13
°C/W
AC Test Loads and Waveforms
Figure 3. AC Test Loads and Waveform
Parameters 2.5V (2.2V to 2.7V) 3.0V (2.7V to 3.6V) Unit
R1 16667 1103
Ω
R2 15385 1554
Ω
R
TH
8000 645
Ω
V
TH
1.20 1.75 V
Data Retention Characteristics
Over the Operating Range
Parameter Description Conditions Min Typ [1] Max Unit
V
DR
V
CC
for Data Retention 1.5 V
I
CCDR
[7] Data Retention Current V
CC
= 1.5V, CE > V
CC
- 0.2V,
V
IN
> V
CC
- 0.2V or V
IN
< 0.2V
Ind’l/Auto-A 4
μA
Auto-E 12
t
CDR
[8] Chip Deselect to Data Retention Time 0 ns
t
R
[9] Operation Recovery Time t
RC
ns
Data Retention Waveform
Figure 4. Data Retention Waveform [10]
V
CC
V
CC
OUTPUT
R2 30 pF
GND
90%
10%
90%
10%
Rise Time = 1 V/ns Fall Time = 1 V/ns
OUTPUT
Equivalent to: THÉVENIN EQUIVALENT
ALL INPUT PULSES
R
TH
R1
V
INCLUDING
JIG AND
SCOPE
V
CC(min)
V
CC(min)
t
CDR
V
DR
> 1.5V
DATA RETENTION MODE
t
R
V
CC
CE or
BHE.BLE
Notes
8. Tested initially and after any design or process changes that may affect these parameters.
9. Full device operation requires linear V
CC
ramp from V
DR
to V
CC(min)
> 100 μs or stable at V
CC(min)
> 100 μs.
10. BHE.BLE is the AND of both BHE and BLE. Deselect the chip by either disabling chip enable signals or by disabling both BHE and BLE.
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