Cypress CY62138FV30 - Manual (Page 6)

Document #: 001-08029 Rev. *E Page 6 of 13
CY62138FV30 MoBL
®
Switching Waveforms
Read Cycle 1 (Address transition controlled) [15, 16]
Read Cycle No. 2 (OE controlled) [10, 16, 17]
Write Cycle No. 1 (WE controlled) [10, 14, 18, 19]
PREVIOUS DATA VALID DATA VALID
RC
t
AA
t
OHA
t RC
ADDRESS
DATA OUT
50% 50%
DATA VALID
t
RC
t
ACE
t
DOE
t
LZOE
t
LZCE
t
PU
HIGH IMPEDANCE
t
HZOE
t
HZCE
t
PD
IMPEDANCE
I
CC
I
SB
HIGH
ADDRESS
CE
DATA OUT
V
CC
SUPPLY
CURRENT
OE
DATA VALID
t
HD
t
SD
t
PWE
t
SA
t
HA
t
AW
t
SCE
t
WC
t
HZOE
ADDRESS
CE
WE
DATA IO
OE
NOTE 20
Notes:
15. The device is continuously selected. OE, CE
1
= V
IL
, CE
2
= V
IH
.
16. WE is HIGH for read cycle.
17. Address valid before or similar to CE
1
transition LOW and CE
2
transition HIGH.
18. Data IO is high impedance if OE = V
IH
.
19. If CE
1
goes HIGH or CE
2
goes LOW simultaneously with WE HIGH, the output remains in high impedance state.
20. During this period, the IOs are in output state. Do not apply input signals.
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