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TMR Processor T8110B/T8110
Issue 18 Feb 08
PD-T8110B/T8110
4
Table of Contents
1.
Description ...................................................................................................................................8
1.1.
Overview ......................................................................................................................................8
1.2.
Hardware Implemented Fault Tolerant (HIFT) Clock...................................................................9
1.3.
Power Distribution........................................................................................................................9
2.
Installation..................................................................................................................................10
2.1.
Module Insertion/Removal .........................................................................................................10
2.2.
PCBs and Connectors ...............................................................................................................10
2.3.
Module Pinout Connections .......................................................................................................11
2.3.1.
External I/O Connector (PL1) ....................................................................................................11
3.
Application .................................................................................................................................12
3.1.
Module Configuration.................................................................................................................12
3.1.1.
Updater Section .........................................................................................................................12
3.1.2.
Security Section .........................................................................................................................12
3.1.3.
ICS2000 Section ........................................................................................................................12
3.1.4.
System Section ..........................................................................................................................12
3.1.5.
ISaGraf Configuration section....................................................................................................16
3.1.6.
Chassis Section .........................................................................................................................16
3.1.7.
InterRange Instrumentation Group. (IRIG) ................................................................................16
3.1.8.
Additional User Serial Ports .......................................................................................................17
3.2.
Complex I/O Equipment Definition.............................................................................................18
I/O Complex Equipment ‘...........................................................................................................18
3.2.1.
TTMRP’......................................................................................................................................18
3.3.
Inter-Module Bus........................................................................................................................21
3.3.1.
Processor Memory Voting Bus ..................................................................................................21
3.3.2.
Inter-Module Bus Voting Bus .....................................................................................................21
3.3.3.
Processor Voting Bus ................................................................................................................21
3.3.4.
Front Panel Voting Bus ..............................................................................................................22
3.4.
Isolation......................................................................................................................................22
4.
Operation ...................................................................................................................................23
4.1.1.
System Overheads ....................................................................................................................24
4.1.2.
On-Line Operator Inputs ............................................................................................................24
4.2.
Standby Processor.....................................................................................................................24
4.3.
Module Management .................................................................................................................24
4.4.
Security ......................................................................................................................................24
4.5.
Front Panel ................................................................................................................................25
4.6.
Module Status LEDS..................................................................................................................26
4.6.1.
Reset Button ..............................................................................................................................27
