Switching characteristics (continued), Figure 3. sec mode - continuous sclk read timing, Cs5560 – Cirrus Logic CS5560 User Manual
Page 9: Switching characteristics
CS5560
DS713PP2
9
5/4/09
SWITCHING CHARACTERISTICS
(CONTINUED)
T
A
= -40 to +85 °C; V1+ = V2+ = +2.5 V, ±5%; V1- = V2- = -2.5 V, ±5%;
VL - VLR = 3.3 V, ±5%, 2.5 V, ±5%, or 1.8 V, ±5%
Input levels: Logic 0 = 0V = Low; Logic 1 = VD+ = High; CL = 15 pF.
14.
SDO will be high impedance when CS is high. In some systems it may require a pull-down resistor.
Parameter
Symbol Min
Typ
Max
Unit
Serial Port Timing in SEC Mode (SMODE = VLR)
SCLK(in) Pulse Width (High)
-
30
-
-
ns
SCLK(in) Pulse Width (Low)
-
30
-
-
ns
CS hold time (high) after RDY falling
t
15
10
-
-
ns
CS hold time (high) after SCLK rising
t
16
10
-
-
ns
CS low to SDO out of Hi-Z
(Note 14)
t
17
-
10
-
ns
Data hold time after SCLK rising
t
18
-
10
-
ns
Data setup time before SCLK rising
t
19
10
-
-
ns
CS hold time (low) after SCLK rising
t
20
10
-
ns
RDY rising after SCLK falling
t
21
-
10
-
ns
1
SCLK
10
MCLK
SCLK(i)
SDO
CS
RDY
LSB
MSB
t
19
t
18
t
20
t
17
t
16
t
15
t
21
Figure 3. SEC Mode - Continuous SCLK Read Timing (Not to Scale)