Cirrus Logic AN150 - Manual (Page 2)

AN150
2 AN150REV2
essary. Any offset or gain errors in the ADC itself
and the front-end analog circuitry will remain if the
device is left uncalibrated.
If the built-in calibration functions of the device are
to be used, the calibrations should be performed be-
fore any conversions take place. Calibrations are
performed by sending the appropriate calibration
command to the converter’s serial port, and waiting
until the SDO line falls low, which indicates that
the calibration has completed. New commands
should not be sent to the converter until the calibra-
tion cycle is complete. More detail about perform-
ing calibrations can be found later in this document
and in the datasheet.
Perform Conversions
Conversions can be performed by sending the ap-
propriate command to the converter, waiting for
SDO to fall, and then clocking the data from the se-
rial port. New commands should not be sent to the
converter during a conversion cycle. The various
conversion modes and options are discussed in
more detail later in this document and in the
datasheet.
QUESTIONS AND ANSWERS
How is the input voltage span of the con-
verter calculated?
The positive full-scale input voltage (V
FS
) is deter-
mined by Equation 1.
In Equation 1, (VREF+) - (VREF-) is the differ-
ence between the voltage levels on the VREF+ and
VREF- pins of the converter. The variable G in the
equation represents the setting of the programma-
ble-gain instrumentation amplifier (PGIA) inside
the part. The variable A in the equation is depen-
dent on the setting of the VRS bit in the Configura-
tion register (bit 25). When this bit is set to ‘0’, A =
2, and when the bit is set to ‘1’, A = 1. R
G
is the
decimal value of the digital gain register, which is
discussed in a later section. For the purposes of this
section, the value of R
G
is 1.0.
The input voltage span in unipolar mode will be
from 0 V to the positive full-scale input voltage
computed using Equation 1. In bipolar mode, the
input voltage span is twice as large, since the input
range goes from negative full-scale (-V
FS
) to posi-
tive full-scale (V
FS
). So for unipolar mode, the in-
put voltage span is V
FS
, and in bipolar mode, it is 2
* V
FS
.
Example: Using a 5V voltage reference, with the
VRS bit set to 0 in the 32X bipolar gain range, we
see that (VREF+)-(VREF-) = 5 V, G = 32, and A =
2. Using Equation 1, V
FS
= (5 V)/(32 * 2) = 78.125
mV. Since we are using bipolar mode, the input
voltage span becomes 2 * VFS = 156.25 mV, or
±78.125 mV.
How are the digital output codes mapped to
the analog input voltage of the converters?
The output codes from the converter are mapped as
either straight binary or two’s complement binary
values, depending on whether the part is in unipolar
or bipolar mode. The part measures voltage on the
analog inputs as the differential between the AIN+
and AIN- pins (AIN+ - AIN-). The smallest amount
of voltage change on the analog inputs which will
cause a change in the output code from the convert-
er is known as an “LSB” (Least Significant Bit),
because it is the LSB of the converter’s output
word that is affected by this voltage change. The
size of one LSB can be calculated with Equation 2.
In Equation 2, “V
SPAN
” is the full input voltage
range as determined by the voltage reference,
PGIA setting, and gain register value. “N” is the
V
FS
VREF+
( )
VREF-
( )
–
( )
G A
× ( )
--------------------------------------------------------
1
R
G
-------
×
=
Equation 1. Full-Scale Input Voltage
LSB
V
SPAN
( )
2 N ( )
--------------------- =
Equation 2. LSB Size