3 dsp i/o description, 1 multiplexed pins, 2 termination requirements – Cirrus Logic CS48AU2B User Manual
Page 9: 3 pads, 4 application code security, Confidenti a l dra ft delp hi

CS48AU2B Data Sheet
Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology
DS876F3
Copyright 2009 Cirrus Logic
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CONFIDENTIAL
CONFIDENTI
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L
DRA
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(that is, host MCU present) a GPIO will be used to signal the host that the watchdog has expired and
the DSP should be rebooted and re-configured.
4.3 DSP I/O Description
4.3.1 Multiplexed Pins
Many of the CS48AU2B pins are multi-functional. For details on pin functionality please refer to the
CS485xx Hardware User’s Manual.
4.3.2 Termination Requirements
Open-drain pins on the CS48AU2B must be pulled high for proper operation. Please refer to the
CS485xx Hardware User’s Manual to identify which pins are open-drain and what value of pull-up
resistor is required for proper operation.
Mode select pins in the CS48AU2B are used to select the boot mode upon the rising edge from
reset. A detailed explanation of termination requirements for each communication mode select pin
can be found in the CS485xx Hardware User’s Manual.
4.3.3 Pads
The CS48AU2B I/Os operate from the 3.3 V supply and are 5 V tolerant.
4.4 Application Code Security
The external program code may be encrypted by the programmer to protect any intellectual property
it may contain. A secret, customer-specific key is used to encrypt the program code that is to be
stored external to the device. Please contact your local Cirrus representative for details.