Device pinout diagram, 1 cs48au2b, 48-pin lqfp pinout diagram, Figure 11. cs48au2b, 48-pin lqfp pinout – Cirrus Logic CS48AU2B User Manual
Page 23: Confidenti a l dra ft delp hi, Cs48au2b, Pin lqfp
CS48AU2B Data Sheet
Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology
DS876F3
Copyright 2009 Cirrus Logic
23
CONFIDENTIAL
CONFIDENTI
A
L
DRA
FT
DELP
HI
8. Device Pinout Diagram
8.1 CS48AU2B, 48-pin LQFP Pinout Diagram
Figure 11. CS48AU2B, 48-Pin LQFP Pinout
XTO
XTI
GNDA
PLL_REF_RES
VDDA (3.3V)
GPIO1, DAI1_DATA2, TM2, DSD2
GPIO2, DAI1_DATA3, TM3, DSD3
GPIO
16,
DAI
1_DA
T
A
0,
TM0,
DSD0
GPI
O
0,
DAI
1_DA
T
A
1,
TM1,
DSD1
38
40
41
42
43
45
46
GPIO13, SCP_BSY , EE_CS
GPOI12, SCP_IRQ
G
P
IO
10
, SCP_
_M
ISO
/ SDA
G
P
IO
9, SCP_MOSI
GPI
O
11
, SCP_CLK
35
33
31
30
28
26
25
GN
D
4
GNDIO4
VDD3
GND3
VDDIO3
GN
D
IO3
23
22
21
19
17
15
1
G
P
IO
5,
D
A
O1
_D
AT
A
3,
X
M
TA
GPIO
3,
DAO1
_
D
AT
A
1,
HS1
DAO1_DATA0, HS0
DAO_LRCLK
DAI1_
LRCLK,
DAI
1_DA
TA4,
D
S
D
5
GP
IO
18
, D
A
O
_MC
LK
DA
I1_SCLK,
D
S
D-C
LK
VDD1
GND1
DAO_SCLK
GPIO
4,
DAO
1_
D
AT
A
2,
HS2
RESET
VDDI
O
1
GNDI
O
1
G
P
IO6,
D
AO2
_DATA
0,
HS
3
GPIO7,
DAO2_D
A
TA1, HS4
VDD
2
GND2
VDDIO2
GNDIO2
2
3
4
5
6
7
9
10
11
12
GPIO8, SCP_CS
TE
S
T
DBDA
DBCK
XTAL_OUT
GPIO15, DAI2_SCLK
GPIO14, DAI2_LRCLK
GPIO17, DAI2_DATA0, DSD4
CS48AU2B
48-Pin
LQFP
8
13
14
16
18
20
24
27
29
32
34
36
37
39
44
47
48