Confidenti a l dra ft d elphi – Cirrus Logic CS48AU2B User Manual
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CS48AU2B Data Sheet
Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology
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Copyright 2009 Cirrus Logic
DS876F3
CONFIDENTIAL
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Figure 9. Digital Audio Output Port Timing, Master Mode
Figure 10. Digital Audio Output Timing, Slave Mode (Relationship LRCLK to SCLK)
DAO_SCLK
DAO_LRCLK
DAOn_DATAn
t
daosstlr
t
daosclk
DAO_SCLK
DAO_LRCLK
t
daoslrts
t
daosdv
t
daosclk
Note: In these diagrams, Falling edge is the inactive edge of DAO_SCLK
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