Cirrus Logic CS485xx - Manual (Page 3)

3 DS734F5
TABLE OF CONTENTS
1 Documentation Strategy ........................................................................................................................................... 1-5
2 Overview ..................................................................................................................................................................... 2-5
2.1 Licensing ............................................................................................................................................................ 2-5
3 Code Overlays ............................................................................................................................................................ 3-6
4 Hardware Functional Description ............................................................................................................................ 4-7
4.1 DSP Core ........................................................................................................................................................... 4-7
4.1.1 DSP Memory ............................................................................................................................................. 4-7
4.1.2 DMA Controller .......................................................................................................................................... 4-7
4.2 On-chip DSP Peripherals ................................................................................................................................... 4-7
4.2.1 Digital Audio Input Port (DAI) .................................................................................................................... 4-7
4.2.2 Digital Audio Output Port (DAO) ................................................................................................................ 4-8
4.2.3 Serial Control Port (I
2 C ™ or SPI ™ ) ............................................................................................................ 4-8
4.2.4 GPIO ......................................................................................................................................................... 4-8
4.2.5 PLL-based Clock Generator ...................................................................................................................... 4-8
4.2.6 Hardware Watchdog Timer ....................................................................................................................... 4-8
4.3 DSP I/O Description ........................................................................................................................................... 4-8
4.3.1 Multiplexed Pins ........................................................................................................................................ 4-8
4.3.2 Termination Requirements ........................................................................................................................ 4-8
4.3.3 Pads .......................................................................................................................................................... 4-9
4.4 Application Code Security .................................................................................................................................. 4-9
5 Characteristics and Specifications .......................................................................................................................... 5-9
5.1 Absolute Maximum Ratings ................................................................................................................................ 5-9
5.2 Recommended Operations Conditions ............................................................................................................... 5-9
5.3 Digital DC Characteristics ................................................................................................................................... 5-9
5.4 Power Supply Characteristics ........................................................................................................................... 5-10
5.5 Thermal Data (48-pin LQFP) ............................................................................................................................ 5-10
5.6 Switching Characteristics—RESET .................................................................................................................. 5-11
5.7 Switching Characteristics—XTI ........................................................................................................................ 5-11
5.8 Switching Characteristics—Internal Clock ........................................................................................................ 5-11
5.9 Switching Characteristics—Serial Control Port–SPI Slave Mode ..................................................................... 5-12
5.10 Switching Characteristics—Serial Control Port–SPI Master Mode ................................................................. 5-13
5.11 Switching Characteristics—Serial Control Port–I
2 C Slave Mode ................................................................... 5-13
5.12 Switching Characteristics—Serial Control Port–I 2 C Master Mode ................................................................. 5-14
5.13 Switching Characteristics—Digital Audio Slave Input Port ............................................................................. 5-15
5.14 Switching Characteristics—DSD Slave Input Port .......................................................................................... 5-15
5.15 Switching Characteristics—Digital Audio Output (DAO) Port ......................................................................... 5-16
6 Ordering Information ............................................................................................................................................... 6-18
7 Environmental, Manufacturing, and Handling Information ................................................................................. 7-18
8 Device Pinout Diagrams .......................................................................................................................................... 8-19
8.1 CS48520, 48-pin LQFP Pinout Diagram .......................................................................................................... 8-19
8.2 CS48540, 48-pin LQFP Pinout Diagram .......................................................................................................... 8-20
8.3 CS48560, 48-pin LQFP Pinout Diagram .......................................................................................................... 8-21
9 Package Mechanical Drawings ............................................................................................................................... 9-22
9.1 48-pin LQFP Package Drawing ........................................................................................................................ 9-22
10 Revision History .................................................................................................................................................. 10-23