Cirrus Logic CS485xx - Manual (Page 23)

23 DS734F5
10 Revision History
10 Revision History
Revision Date Changes
A1 July, 2006 Advance release.
A2 July, 2006 Updated pinout definition for pins 26 and 27. Updated typical power numbers.
A3 December 5, 2006 Updated sections 2.0, 4.21, 5.8, Table 3, Table 4, to show new device numbering scheme. Updated
sections 8.1, 8.2, 8.3.
PP1 March 12, 2007 Preliminary Release
PP2 December 18, 2007 Changed title of data sheet from CS48500 Data Sheet to CS485xx Family Data Sheet to cover all CS485xx
family products. Updated Standby Power specification in
Section 5.4 . Updated DAO timing specifications
and timing diagrams in Section 5.15 .
F1 April 21, 2007 Removed DSD Phase Modulation Mode from Section 5.14 . Removed reference to MCLK in Section 5.14 .
Redefined Master mode clock speed for SCP_CLK in Section 5.10 . Redefined DC leakage
characterization data in Section 5.3 . Added typical crystal frequency values in Table Footnote 1 under
Section 5.7 . Modified Footnote 1 under Section 5.9 . Modified power supply characteristics in Section 5.4 ,
F2 July 14, 2008 Added reference to support for time division multiplexed (TDM) one-line data mode for DAO port in
Section 4.2.2 .
F3 February 16, 2009 Updated Section 5.5 , adding Junction Temperature specification.
F4 June 29, 2011 Updated Section 5.10 ; changed T
spidsu
value to 13 ns.
F5 October, 2011 Updated Section 5.15 DAO output slave mode specifications.