Cirrus Logic CS44800 - Manual (Page 58)

58 DS632F1
CS44800
1. Convert the decimal integer to binary. This is MSTR_IVOL[7:0].
2. Select the bit representation of the desired 0.25 fractional increment. This is MSTR_FVOL[1:0].
3. Concatenate MSTR_IVOL[7:0]: MSTR_FVOL[1:0] to form a 10-bit binary value.
4. Perform a 2’s complement conversion on all 10 bits.
The upper 8 bits are now the new MSTR_FVOL[7:0] and the two lower bits are MSTR_FVOL[1:0].
To convert from a 2’s complement integer:fraction value to a negative decimal, do the following:
1. Concatenate MSTR_IVOL[7:0]: MSTR_FVOL[1:0] to form a 10-bit binary value.
2. Perform a 2’s complement conversion on all 10 bits.
3. Convert the 10-bit binary number to a decimal value.
4. Divide the decimal value by 4.
MSTR_IVOL[7:0] MSTR_FVOL(1:0) Volume Setting
0001 1000 00 +24.00 dB
0001 0111 10 +23.50 dB
0000 0001 11 +1.75 dB
0000 0001 00 +1.00 dB
0000 0000 01 +0.25 dB
0000 0000 00 0 dB
1111 1111 10 -0.50 dB
1111 1111 00 -1.00 dB
1111 1110 11 -1.25 dB
1111 1101 10 -2.50 dB
1000 0010 00 -126.00 dB
1000 0001 11 -126.25 dB
1000 0001 00 -127.00 dB
Table 7. Master Fractional Volume Settings